{"name":"ferrilog-core","vers":"0.1.0","deps":[{"name":"libc","req":"^0.2","features":[],"optional":false,"default_features":true,"target":null,"kind":"normal"},{"name":"ryu","req":"^1","features":[],"optional":false,"default_features":true,"target":null,"kind":"normal"}],"cksum":"0ab466e647d7ddfa74d69708ee55dddc88a4a927502033efde83134032179385","features":{"buffer-16m":[],"buffer-1m":[],"buffer-2m":[],"buffer-32m":[],"buffer-4m":[],"buffer-64m":[],"buffer-8m":[],"default":["buffer-2m"]},"yanked":false,"pubtime":"2026-03-29T01:34:50Z"}